According to the datasheet this is not good, because when this signal is low then the memory is (counter-intuitively) not ready yet and requires the CPU to stretch the access cycle.
The HALT# signal was high as expected, but the MRDY# signal was stuck low. This was not happening because BA and BS never went to the IRQ acknowledge state, but IRQ signals can be masked by an interrupt disable bit so this does not necessarily mean that the CPU is bad, and indeed interrupts are disabled by default when the CPU resets. The 74LS74 and the 74LS139 at 9J and 9K latch the interrupt coming from the hardware and clear it when the CPU confirms to have started serving it. In particular BA low and BS high means that the CPU has accepted an IRQ. Now, according to the datasheet of the 6809, the BA and BS pin signal the internal status of the CPU similar to what the 68k does. The first thing that called for my attention was the IRQ# signal, which pulsed high when the board booted then went low and stayed like that. Thanks to some good soul who made them available a couple of years ago, the schematics for this board are available.
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